hdl.BlackBox |
Black box for including custom HDL code |
hdl.RAM |
Single, simple dual, or dual-port RAM for memory read/write
access |
hdl.RAM.step |
Read or write input value to memory location |
hdladvisor |
Display HDL Workflow Advisor |
hdlcoder.Board |
Board registration object that describes SoC custom board |
hdlcoder.Board.addExternalIOInterface |
Define external IO interface for board object |
hdlcoder.Board.addExternalPortInterface |
Define external port interface for board object |
hdlcoder.Board.validateBoard |
Check property values in board object |
hdlcoder.CodingStandard |
Create HDL coding standard customization object |
hdlcoder.OptimizationConfig |
hdlcoder.optimizeDesign configuration
object |
hdlcoder.optimizeDesign |
Automatic iterative HDL design optimization |
hdlcoder.ReferenceDesign |
Reference design registration object that describes SoC
reference design |
hdlcoder.ReferenceDesign.addAXI4SlaveInterface |
Add and define AXI4 slave interface |
hdlcoder.ReferenceDesign.addClockInterface |
Add clock and reset interface |
hdlcoder.ReferenceDesign.addCustomEDKDesign |
Specify Xilinx EDK MHS project file |
hdlcoder.ReferenceDesign.addCustomQsysDesign |
Specify Altera Qsys project file |
hdlcoder.ReferenceDesign.addCustomVivadoDesign |
Specify Xilinx Vivado exported block design
Tcl file |
hdlcoder.ReferenceDesign.addInternalIOInterface |
Add and define internal IO interface between generated
IP core and existing IP cores |
hdlcoder.ReferenceDesign.addParameter |
Add and define custom parameters for your reference design |
hdlcoder.ReferenceDesign.CallbackCustomProgrammingMethod |
Function handle for custom callback function that gets
executed during Program Target Device task in the Workflow Advisor |
hdlcoder.ReferenceDesign.EmbeddedCoderSupportPackage |
Specify whether to use an Embedded Coder support package |
hdlcoder.ReferenceDesign.PostBuildBitstreamFcn |
Function handle for callback function that gets executed
after Build FPGA Bitstream task in the HDL Workflow Advisor |
hdlcoder.ReferenceDesign.PostCreateProjectFcn |
Function handle for callback function that gets executed
after Create Project task in the HDL Workflow Advisor |
hdlcoder.ReferenceDesign.PostSWInterfaceFcn |
Function handle for custom callback function that gets
executed after Generate Software Interface Model task in the HDL Workflow
Advisor |
hdlcoder.ReferenceDesign.PostTargetInterfaceFcn |
Function handle for callback function that gets executed
after Set Target Interface task in the HDL Workflow Advisor |
hdlcoder.ReferenceDesign.PostTargetReferenceDesignFcn |
Function handle for callback function that gets executed
after Set Target Reference Design task in the HDL Workflow Advisor |
hdlcoder.ReferenceDesign.validateReferenceDesign |
Check property values in reference design object |
hdlcoder.runWorkflow |
Run HDL code generation and deployment workflow |
hdlcoder.supportedDevices |
Show supported target hardware and device details |
hdlcoder.WorkflowConfig |
Configure HDL code generation and deployment workflows |
hdlcoder.WorkflowConfig.clearAllTasks |
Disable all tasks in workflow |
hdlcoder.WorkflowConfig.export |
Generate MATLAB script that recreates the workflow
configuration |
hdlcoder.WorkflowConfig.setAllTasks |
Enable all tasks in workflow |
hdlcoder.WorkflowConfig.validate |
Check property values in HDL Workflow CLI configuration
object |
hdldispblkparams |
Display HDL block parameters with nondefault values |
hdldispmdlparams |
Display HDL model parameters with nondefault values |
hdlget_param |
Return value of specified HDL block-level parameter for
specified block |
hdllib |
Display blocks that are compatible with HDL code generation |
hdlrestoreparams |
Restore block- and model-level HDL parameters to model |
hdlsaveparams |
Save nondefault block- and model-level HDL parameters |
hdlset_param |
Set HDL-related parameters at model or block level |
hdlsetup |
Set up model parameters for HDL code generation |
hdlsetuptoolpath |
Set up system environment to access FPGA synthesis software |