step

System object: hdl.RAM
Package: hdl

Read or write input value to memory location

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Syntax

DATAOUT = step(H,WRITEDATA,READWRITEADDRESS,WRITEENABLE)
READDATAOUT = step(H,WRITEDATA,WRITEADDRESS,WRITEENABLE,READADDRESS)
[WRITEDATAOUT,READDATAOUT] = step(H,WRITEDATA,WRITEADDRESS,WRITEENABLE,READADDRESS)

Description

    Note:   Starting in R2016b, instead of using the step method to perform the operation defined by the System object™, you can call the object with arguments, as if it were a function. For example, y = step(obj,x) and y = obj(x) perform equivalent operations.

DATAOUT = step(H,WRITEDATA,READWRITEADDRESS,WRITEENABLE) reads the value in memory location READWRITEADDRESS when WRITEENABLE is false. When WRITEENABLE is true, you can write the value WRITEDATA into the memory location READWRITEADDRESS. DATAOUT is the new or old data at READWRITEADDRESS when or the data at READWRITEADDRESS when WRITEENABLE is false. This step syntax is appropriate for a single-port RAM System object.

READDATAOUT = step(H,WRITEDATA,WRITEADDRESS,WRITEENABLE,READADDRESS) writes the value WRITEDATA into memory location WRITEADDRESS when WRITEENABLE is true. READDATAOUT is the old data at the address location READADDRESS. This step syntax is appropriate for a simple dual-port RAM System object.

[WRITEDATAOUT,READDATAOUT] = step(H,WRITEDATA,WRITEADDRESS,WRITEENABLE,READADDRESS) writes the value WRITEDATA into the memory location WRITEADDRESS when WRITEENABLE is true. WRITEDATAOUT is the new or old data at memory location WRITEADDRESS. READDATAOUT is the old data at the address location READADDRESS. This step syntax is appropriate for a dual-port RAM System object.

hdl.RAM Input Requirements

Inputs must be either all scalar or all vectors of the same size.

InputData TypeRequirement
WRITEDATAThis value can be double, single, integer, or a fixed-point (fi) object, and can be real or complex.

Scalar or vector.

WRITEENABLEThis value must be logical.

Scalar or vector.

If WRITEDATA is a vector, this value must be a vector of the same size.

WRITEADDRESS and READADDRESSThis value can be either fixed-point (fi) objects or integers, and must be real and unsigned.Scalar or vector. If WRITEDATA is a vector, this value must be a vector of the same size.

Examples

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Open Script

Create System object that writes to a single port RAM and reads the newly written value.

Construct single-port RAM System object.

hRAM = hdl.RAM('RAMType','Single port','WriteOutputValue','New data');

Preallocate memory.

dataLength    = 100;
[dataIn dataOut] = deal(zeros(1,dataLength));

Write randomly generated data to the System object, and then read data back out again.

for ii = 1:dataLength
  dataIn(ii)  = randi([0 63],1,1,'uint8');
  addressIn   = uint8(ii-1);
  writeEnable = true;
  dataOut(ii) = step(hRAM,dataIn(ii),addressIn,writeEnable);
end ;

Create System object that can write vector data to a dual-port RAM and read vector data out.

Construct dual-port RAM System object.

persistent ramObj;
hRAM = hdl.RAM('RAMType','Dual port','WriteOutputValue','New data');

Create vector write data, addresses, and enables, and allocate memory for the read data.

% RAM inputs
ramDataIn = fi(randi(1,4),0,16,0);
ramWriteEn = [true, false, false, true];
% address range [a,b]
a = 0;
b = 7;
ramReadAddr = fi(round((b-a).*rand(1,4) + a), 0, 3, 0);
ramWriteAddr = fi(round((b-a).*rand(1,4) + a), 0, 3, 0);

Write vector data to the System object, and read vector data out.

% RAM access
[wrout,rdout] = step(ramObj, ramDataIn,ramWriteAddr,ramWriteEn,ramReadAddr);

Related Examples

See Also

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