Check subsystem or model for HDL code generation compatibility
checkhdl(bdroot)
checkhdl('dut')
checkhdl(gcb)
output = checkhdl('system')
checkhdl generates an HDL Code Generation
Check Report, saves the report to the target folder, and displays
the report in a new window. Before generating HDL code, use checkhdl to
check your subsystems or models.
The report lists compatibility errors with a link to each block or subsystem that caused a problem. To highlight and display incompatible blocks, click each link in the report while keeping the model open.
The report file name is system_report.htmlsystem is
the name of the subsystem or model passed in to checkhdl.
When a model or subsystem passes checkhdl,
that does not imply code generation will complete. checkhdl does
not verify all block parameters.
checkhdl(bdroot) examines the current model
for HDL code generation compatibility.
checkhdl(' examines
the specified DUT model name, model reference name, or subsystem name
with full hierarchical path.dut')
checkhdl(gcb) examines the currently selected
subsystem.
output = checkhdl(' system')
does not generate a report. Instead, it returns a 1xN struct
array with one entry for each error, warning, or message. system specifies
a model or the full block path for a subsystem at any
level of the model hierarchy.
checkhdl reports three levels of compatibility
problems:
Errors: cause the code generation process to terminate. The report must not contain errors to continue with HDL code generation.
Warnings: indicate problems in the generated code, but allow HDL code generation to continue.
Messages: indication that some data types have special treatment. For example, the HDL Coder™ software automatically converts single-precision floating-point data types to double-precision because VHDL® and Verilog® do not support single-precision data types.
Check the subsystem symmetric_fir within
the model sfir_fixed for HDL code generation compatibility
and generate a compatibility report.
checkhdl('sfir_fixed/symmetric_fir')
Check the subsystem symmetric_fir_err within
the model sfir_fixed_err for HDL code generation
compatibility, and return information on problems encountered in the
struct output.
output = checkhdl('sfir_fixed_err/symmetric_fir_err')
### Starting HDL Check.
...
### HDL Check Complete with 4 errors, warnings and messages.
The following MATLAB® commands display the top-level structure
of the struct output, and its first cell.
output =
1x4 struct array with fields:
path
type
message
level
output(1)
ans =
path: 'sfir_fixed_err/symmetric_fir_err/Product'
type: 'block'
message: 'Unhandled mixed double and non-double datatypes at ports of block'
level: 'Error'