hdl.RAM |
Single, simple dual, or dual-port RAM for memory read/write access |
hdl.BlackBox |
Black box for including custom HDL code |
matlab.System |
Base class for System objects |
matlab.system.mixin.Nondirect |
Nondirect feedthrough mixin class |
matlab.system.StringSet |
Set of valid character vector values |
hdl.RAM |
Single, simple dual, or dual-port RAM for memory read/write access |
hdl.BlackBox |
Black box for including custom HDL code |
codegen |
Generate HDL code from MATLAB code |
coder.config |
Create HDL Coder code generation configuration objects |
coder.approximation |
Create function replacement configuration object |
coder.FixptConfig |
Floating-point to fixed-point conversion configuration object |
codegen |
Generate HDL code from MATLAB code |
coder.config |
Create HDL Coder code generation configuration objects |
hdlcoder.CodingStandard |
Create HDL coding standard customization object |
hdlsetuptoolpath |
Set up system environment to access FPGA synthesis software |
coder.HdlConfig |
HDL codegen configuration object |
hdl.BlackBox |
Black box for including custom HDL code |
hdlsetuptoolpath |
Set up system environment to access FPGA synthesis software |
coder.hdl.loopspec |
Unroll or stream loops in generated HDL code |
coder.hdl.pipeline |
Insert pipeline registers at output of MATLAB expression |
hdlset_param |
Set HDL-related parameters at model or block level |
hdlget_param |
Return value of specified HDL block-level parameter for specified block |
hdlsaveparams |
Save nondefault block- and model-level HDL parameters |
hdlrestoreparams |
Restore block- and model-level HDL parameters to model |
hdldispmdlparams |
Display HDL model parameters with nondefault values |
hdldispblkparams |
Display HDL block parameters with nondefault values |
hdladvisor |
Display HDL Workflow Advisor |
hdlsetup |
Set up model parameters for HDL code generation |
hdlsetuptoolpath |
Set up system environment to access FPGA synthesis software |
makehdl |
Generate HDL RTL code from model, subsystem, or model reference |
makehdltb |
Generate HDL test bench from model or subsystem |
hdlsetup |
Set up model parameters for HDL code generation |
hdlsetuptoolpath |
Set up system environment to access FPGA synthesis software |
hdlset_param |
Set HDL-related parameters at model or block level |
hdlget_param |
Return value of specified HDL block-level parameter for specified block |
hdlsaveparams |
Save nondefault block- and model-level HDL parameters |
hdlrestoreparams |
Restore block- and model-level HDL parameters to model |
hdldispmdlparams |
Display HDL model parameters with nondefault values |
hdldispblkparams |
Display HDL block parameters with nondefault values |
hdlcoder.WorkflowConfig |
Configure HDL code generation and deployment workflows |
hdlcoder.runWorkflow |
Run HDL code generation and deployment workflow |
hdlcoder.WorkflowConfig.export |
Generate MATLAB script that recreates the workflow configuration |
hdlcoder.WorkflowConfig.setAllTasks |
Enable all tasks in workflow |
hdlcoder.WorkflowConfig.clearAllTasks |
Disable all tasks in workflow |
hdlcoder.WorkflowConfig.validate |
Check property values in HDL Workflow CLI configuration object |
hdlcoder.CodingStandard |
Create HDL coding standard customization object |
makehdltb |
Generate HDL test bench from model or subsystem |
hdlsetuptoolpath |
Set up system environment to access FPGA synthesis software |
hdlcoder.optimizeDesign |
Automatic iterative HDL design optimization |
hdlcoder.supportedDevices |
Show supported target hardware and device details |
hdlcoder.OptimizationConfig |
hdlcoder.optimizeDesign configuration object |
hdlcoder.Board |
Board registration object that describes SoC custom board |
hdlcoder.ReferenceDesign |
Reference design registration object that describes SoC reference design |
hdlcoder.Board |
Board registration object that describes SoC custom board |
hdlcoder.ReferenceDesign |
Reference design registration object that describes SoC reference design |
hdlcoder.Board |
Board registration object that describes SoC custom board |
hdlcoder.ReferenceDesign |
Reference design registration object that describes SoC reference design |