| State Control | Properties and restrictions for HDL code generation |
| Synchronous Subsystem | Represent subsystem that has synchronous reset and enable behavior (HDL Coder) |
| Enabled Synchronous Subsystem | Represent enabled subsystem that has synchronous reset and enable behavior (HDL Coder) |
| Resettable Synchronous Subsystem | Represent subsystem that has synchronous reset and enable behavior (HDL Coder) |
Synchronous Subsystem Behavior with the State Control Block
What is a State Control Block and how does it generate cleaner HDL code