HDL Operations

Blocks that model HDL components, such as HDL FIFO, Bit Shift, and Dual Port RAM

Blocks

HDL FIFO Stores sequence of input samples in first in, first out (FIFO) register (HDL Coder)
HDL Counter Free-running or count-limited hardware counter (HDL Coder)
HDL Reciprocal Calculate reciprocal with Newton-Raphson approximation method (HDL Coder)
Dual Port RAM Dual port RAM with two output ports (HDL Coder)
Dual Rate Dual Port RAM Dual Port RAM that supports two rates (HDL Coder)
Simple Dual Port RAM Dual port RAM with single output port (HDL Coder)
Single Port RAM Single port RAM (HDL Coder)
Multiply-Add Multiply-add combined operation for HDL Coder
Bit Concat Concatenates up to 128 input words into single output (HDL Coder)
Bit Reduce AND, OR, or XOR bit reduction on all input signal bits to single bit (HDL Coder)
Bit Rotate Rotate input signal by bit positions (HDL Coder)
Bit Shift Logical or arithmetic shift of input signal (HDL Coder)
Bit Slice Return field of consecutive bits from input signal (HDL Coder)
Serializer1D Convert vector signal to scalar or smaller vectors (HDL Coder)
Deserializer1D Convert scalar stream or smaller vectors to vector signal (HDL Coder)

Topics

Build a ROM Block with Simulink Blocks

HDL Coder™ does not provide a ROM block, but you can easily build one using basic Simulink® blocks.

Was this topic helpful?