Model referencing in your DUT subsystem enables you to:
Partition a large design into a hierarchy of smaller designs for reuse, modular development, and accelerated simulation.
Incrementally generate and test code.
HDL Coder™ incrementally generates code for referenced models according to the Configuration Parameters dialog box > Model Referencing pane > Rebuild options.
However, HDL Coder treats If any changes detected and If
any changes in known dependencies detected as the same.
For example, if you set Rebuild to either If
any changes detected or If any changes
in known dependencies detected, HDL Coder regenerates
code for referenced models only when the referenced models have changed.
To generate HDL code for referenced model using the UI:
Right-click the Model block and select HDL Code > HDL Block Properties.
For Architecture, select ModelReference.
Generate HDL code from your DUT subsystem.
Tip
If you encounter typing or naming conflicts between vector ports
when interfacing two or more generated VHDL® code modules, consider
using the |
To generate HDL code for a referenced model using the command line:
Set the Architecture property
of the Model block to ModelReference.
Generate HDL code for your DUT subsystem.
For example, to generate HDL code for a DUT subsystem, mydut,
that includes a model reference, referenced_model,
at the command line, enter:
hdlset_param ('mydut/referenced_model', 'Architecture', 'ModelReference');
makehdl ('mydut');Tip
If you encounter typing or naming conflicts between vector ports
when interfacing two or more generated VHDL code modules, consider
using the |
For model reference code generation restrictions, see Model.