ScalarizePorts
Flatten vector ports into structure of scalar ports in VHDL code
Settings
'on'
When generating code for a vector port, generate a structure of scalar ports
'off' (default)
Do not generate a structure of scalar ports for a vector port.
Usage Notes
The ScalarizePorts property lets you control
how HDL Coder™ generates VHDL® code for vector ports.
For example, consider the subsystem vsum in
the following figure.
By default, ScalarizePorts is 'off'.
The coder generates a type definition and port declaration for the
vector port In1 like the following:
PACKAGE simplevectorsum_pkg IS
TYPE vector_of_std_logic_vector16 IS ARRAY (NATURAL RANGE <>)
OF std_logic_vector(15 DOWNTO 0);
TYPE vector_of_signed16 IS ARRAY (NATURAL RANGE <>) OF signed(15 DOWNTO 0);
END simplevectorsum_pkg;
.
.
.
ENTITY vsum IS
PORT( In1 : IN vector_of_std_logic_vector16(0 TO 9); -- int16 [10]
Out1 : OUT std_logic_vector(19 DOWNTO 0) -- sfix20
);
END vsum;Under VHDL typing rules two types declared in this manner are not compatible across design units. This may cause problems if you need to interface two or more generated VHDL code modules.
You can flatten such a vector port into a structure of scalar
ports by enabling ScalarizePorts in your makehdl command,
as in the following example.
makehdl(gcs,'ScalarizePorts','on')
The listing below shows the generated ports.
ENTITY vsum IS
PORT( In1_0 : IN std_logic_vector(15 DOWNTO 0); -- int16
In1_1 : IN std_logic_vector(15 DOWNTO 0); -- int16
In1_2 : IN std_logic_vector(15 DOWNTO 0); -- int16
In1_3 : IN std_logic_vector(15 DOWNTO 0); -- int16
In1_4 : IN std_logic_vector(15 DOWNTO 0); -- int16
In1_5 : IN std_logic_vector(15 DOWNTO 0); -- int16
In1_6 : IN std_logic_vector(15 DOWNTO 0); -- int16
In1_7 : IN std_logic_vector(15 DOWNTO 0); -- int16
In1_8 : IN std_logic_vector(15 DOWNTO 0); -- int16
In1_9 : IN std_logic_vector(15 DOWNTO 0); -- int16
Out1 : OUT std_logic_vector(19 DOWNTO 0) -- sfix20
);
END vsum;Set or View This Property
To set this property, use hdlset_param or makehdl. To view the property value, use hdlget_param.