Implement fixed-point sine wave using lookup table approach that exploits quarter wave symmetry (HDL Coder)
The Sine block is available with Simulink®.
For information about the simulation behavior and block parameters, see Sine, Cosine.
The HDL code implements Sine using the quarter-wave lookup table you specify in the Simulink block parameters.
To avoid generating a division operator
(/) in the HDL code, for Number of data
points for lookup table, enter (2^. n)+1n is
an integer.
Number of registers to place at the outputs by moving existing delays within your design. Distributed pipelining does not redistribute these registers. The default is 0. See also ConstrainedOutputPipeline.
Number of input pipeline stages to insert in the generated code. Distributed pipelining and constrained output pipelining can move these registers. The default is 0. See also InputPipeline.
Number of output pipeline stages to insert in the generated code. Distributed pipelining and constrained output pipelining can move these registers. The default is 0. See also OutputPipeline.