Cosine

Implement fixed-point cosine wave using lookup table approach that exploits quarter wave symmetry (HDL Coder)

Description

The Cosine block is available with Simulink®.

For information about the simulation behavior and block parameters, see Sine, Cosine.

HDL Architecture

The HDL code implements Cosine using the quarter-wave lookup table that you specify in the Simulink block parameters.

To avoid generating a division operator (/) in the HDL code, for Number of data points for lookup table, enter (2^n)+1. n is an integer.

HDL Block Properties

ConstrainedOutputPipeline

Number of registers to place at the outputs by moving existing delays within your design. Distributed pipelining does not redistribute these registers. The default is 0. See also ConstrainedOutputPipeline.

InputPipeline

Number of input pipeline stages to insert in the generated code. Distributed pipelining and constrained output pipelining can move these registers. The default is 0. See also InputPipeline.

OutputPipeline

Number of output pipeline stages to insert in the generated code. Distributed pipelining and constrained output pipelining can move these registers. The default is 0. See also OutputPipeline.

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