Divide

Divide one input by another (HDL Coder)

Description

The Divide block is available with Simulink®.

For information about the simulation behavior and block parameters, see Divide.

HDL Architecture

To perform an HDL-optimized divide operation, connect a Product block to a Divide block in reciprocal mode. For information about the Divide block in reciprocal mode, see Reciprocal Mode.

Default Mode

In default mode, the Divide block supports only integer data types for HDL code generation.

ArchitectureParametersDescription
default
Linear
NoneGenerate a divide (/) operator in the HDL code.

Reciprocal Mode

When Number of Inputs is set to /, the Divide block is in reciprocal mode.

This block has multi-cycle implementations that introduce additional latency in the generated code. To see the added latency, view the generated model or validation model. See Generated Model and Validation Model.

In reciprocal mode, the Divide block has the HDL block implementations described in the following table.

ArchitecturesParametersAdditional cycles of latencyDescription
default
Linear
None0

When you compute a reciprocal, use the HDL divide (/) operator to implement the division.

ReciprocalRsqrtBasedNewtonIterations

Signed input: Iterations + 5

Unsigned input: Iterations + 3

Use the iterative Newton method. Select this option to optimize area.

The default value for Iterations is 3.

The recommended value for Iterations is between 2 and 10. If Iterations is outside the recommended range, HDL Coder™ displays a message.

ReciprocalRsqrtBasedNewtonSingleRateIterations

Signed input: (Iterations * 4) + 8

Unsigned input: (Iterations * 4) + 6

Use the single rate pipelined Newton method. Select this option to optimize speed, or if you want a single rate implementation.

The default value for Iterations is 3.

The recommended value for Iterations is between 2 and 10. If Iterations is outside the recommended range, the coder displays a message.

The Newton-Raphson iterative method:

xi+1=xif(xi)f'(xi)=xi(1.50.5axi2)

ReciprocalRsqrtBasedNewton and ReciprocalRsqrtBasedNewtonSingleRate implement the Newton-Raphson method with:

f(x)=1x21

HDL Block Properties

ConstrainedOutputPipeline

Number of registers to place at the outputs by moving existing delays within your design. Distributed pipelining does not redistribute these registers. The default is 0. See also ConstrainedOutputPipeline.

DSPStyle

Synthesis attributes for multiplier mapping. The default is none. See also DSPStyle.

InputPipeline

Number of input pipeline stages to insert in the generated code. Distributed pipelining and constrained output pipelining can move these registers. The default is 0. See also InputPipeline.

OutputPipeline

Number of output pipeline stages to insert in the generated code. Distributed pipelining and constrained output pipelining can move these registers. The default is 0. See also OutputPipeline.

Complex Data Support

This block does not support code generation for division with complex signals.

Restrictions

When you use the Divide block in reciprocal mode, the following restrictions apply:

  • The input must be scalar and must have integer or fixed-point (signed or unsigned) data type.

  • The output must be scalar and have integer or fixed-point (signed or unsigned) data type.

  • Only the Zero rounding mode is supported.

  • You must select the Saturate on integer overflow option on the block.

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