Specify whether generated VHDL code includes inline configurations
'on'
(default)
Selected (default)
Include VHDL® configurations in files that instantiate a component.
'off'
Cleared
Suppress the generation of configurations and require user-supplied external configurations. Use this setting if you are creating your own VHDL configuration files.
VHDL configurations can be either inline with the rest of the VHDL code for an entity or external in separate VHDL source files. By default, HDL Coder™ includes configurations for a model within the generated VHDL code. If you are creating your own VHDL configuration files, you should suppress the generation of inline configurations.
To set this property, use hdlset_param
or makehdl
. To view the property value, use hdlget_param
.