Documentation

HDL Code Generation Top-Level Pane Overview

The top-level HDL Code Generation pane contains buttons that initiate code generation and compatibility checking, and sets code generation parameters.

Buttons in the HDL Code Generation Top-Level Pane

The buttons in the HDL Code Generation pane perform functions related to code generation. These buttons are:

Generate HDL for

Select the subsystem or model from which code is generated. The list includes the path to the root model and to subsystems in the model.

Settings

Default: The root model is selected.

Command-Line Information

Pass in the path to the model or subsystem for which code is to be generated as the first argument to makehdl.

See Also

makehdl

Language

Select the language (VHDL^® or Verilog^®) in which code is generated. The selected language is referred to as the target language.

Settings

Default: VHDL

VHDL

Generate VHDL code.

Verilog

Generate Verilog code.

Command-Line Information

To set this property, use hdlset_param or makehdl. To view the property value, use hdlget_param.

See Also

• TargetLanguage

• makehdl

Folder

Enter a path to the folder into which code is generated. Alternatively, click Browse to navigate to and select a folder. The selected folder is referred to as the target folder.

Settings

Default: The default target folder is a subfolder of your working folder, named hdlsrc.

Command-Line Information

To set this property, use hdlset_param or makehdl. To view the property value, use hdlget_param.

See Also

• TargetDirectory

• makehdl

Generate HDL code

Enable or disable HDL code generation for the model.

Settings

Default: On

On

Generate HDL code.

Off

Do not generate HDL code.

Command-Line Information

To set this property, use hdlset_param or makehdl. To view the property value, use hdlget_param.

See Also

GenerateHDLCode

Generate validation model

Enable or disable generation of a validation model that verifies the functional equivalence of the original model with the generated model. The validation model contains both the original and the generated DUT models.

If you enable generation of a validation model, also enable delay balancing to keep the generated DUT model synchronized with the original DUT model. Validation fails when there is a mismatch between delays in the original DUT model and delays in the generated DUT model.

Settings

Default: Off

On

Generate the validation model.

Off

Do not generate the validation model.

Command-Line Information

To set this property, use hdlset_param or makehdl. To view the property value, use hdlget_param.

See Also

GenerateValidationModel, BalanceDelays

Generate traceability report

Enable or disable generation of an HTML code generation report with hyperlinks from code to model and model to code.

Settings

Default: Off

On

Create and display an HTML code generation report. See Create and Use Code Generation Reports.

Off

Do not create an HTML code generation report.

Command-Line Information

To set this property, use hdlset_param or makehdl. To view the property value, use hdlget_param.

See Also

Traceability

Generate resource utilization report

Enable or disable generation of an HTML resource utilization report

Settings

Default: Off

On

Create and display an HTML resource utilization report. The report contains information about the number of hardware resources (multipliers, adders, registers) used in the generated HDL code. The report includes hyperlinks to the referenced blocks in the model. See Create and Use Code Generation Reports.

Off

Do not create an HTML resource utilization report.

Command-Line Information

To set this property, use hdlset_param or makehdl. To view the property value, use hdlget_param.

See Also

ResourceReport

Generate high-level timing critical path report

Specify whether to generate a highlighting script that shows the estimated critical path.

Settings

Default: Off

On

Generate a highlighting script that shows the estimated critical path.

The highlighting script is displayed as a link you can click to highlight the estimated critical path in the generated model. If your design contains blocks without timing information, another highlighting script is generated to highlight those blocks.

Off

Do not calculate the estimated critical path.

Command-Line Information

To set this property, use hdlset_param or makehdl. To view the property value, use hdlget_param.

See Also

• CriticalPathEstimation

• CriticalPathEstimationFile

• BlocksWithNoCharacterizationFile

• Find Estimated Critical Paths Without Synthesis Tools

Generate optimization report

Enable or disable generation of an HTML optimization report

Settings

Default: Off

On

Create and display an HTML optimization report. The report contains information about the results of streaming, sharing, and distributed pipelining optimizations that were implemented in the generated code. The report includes hyperlinks back to referenced blocks, subsystems, or validation models.See Create and Use Code Generation Reports.

Off

Do not create an HTML optimization report.

Command-Line Information

To set this property, use hdlset_param or makehdl. To view the property value, use hdlget_param.

See Also

OptimizationReport

Generate model Web view

Include the model Web view in the code generation report to navigate between the code and model within the same window. You can share your model and generated code outside of the MATLAB environment. You must have a Simulink^® Report Generator™ license to include a Web view of the model in the code generation report.

Settings

Default: Off

On

Include model Web view in the code generation report.

Off

Omit model Web view in the code generation report.

Command-Line Information

To set this property, use hdlset_param or makehdl. To view the property value, use hdlget_param.

See Also

Web View of Model in Code Generation Report