Settings

'VHDL' (default)

VHDL (default)

Generate VHDL^® code.

'Verilog'

Verilog

Generate Verilog^® code.

The generated HDL code complies with the following standards:

• VHDL-1993 (IEEE^® 1076-1993) or later

• Verilog-2001 (IEEE 1364-2001) or later

Set or View This Property

To set this property, use hdlset_param or makehdl. To view the property value, use hdlget_param.