Compute index and fraction for Interpolation Using Prelookup block (HDL Coder)
The Prelookup block is available with Simulink®.
For information about the simulation behavior and block parameters, see Prelookup.
This block has a single, default HDL architecture.
Number of registers to place at the outputs by moving existing delays within your design. Distributed pipelining does not redistribute these registers. The default is 0. See also ConstrainedOutputPipeline.
Number of input pipeline stages to insert in the generated code. Distributed pipelining and constrained output pipelining can move these registers. The default is 0. See also InputPipeline.
Number of output pipeline stages to insert in the generated code. Distributed pipelining and constrained output pipelining can move these registers. The default is 0. See also OutputPipeline.
Breakpoint data: For Source,
select Dialog.
Specification: You can select
either Explicit values or Even
spacing.
Index search method: Select Evenly
spaced points.
Extrapolation method: Select Clip.
Diagnostic for out-of-range input:
Select Error.
Use last breakpoint for input at or above upper limit: Select this check box.
Breakpoint: For Data
Type, select Inherit: Same as input.
Integer rounding mode: Select Zero, Floor,
or Simplest.
It is good practice to structure your table such that the spacing between breakpoints is a power of two. If the breakpoint spacing does not meet this condition, HDL Coder™ issues a warning. When the breakpoint spacing is a power of two, you can replace division operations in the prelookup step with right-shift operations.
All ports on the block require scalar values.
The coder permits floating-point data for breakpoints.