Settings

'postfix'

Default: '_pipe'

When you specify a generation of input and/or output pipeline registers for selected blocks, HDL Coder™ appends the postfix that is specified as a character vector by the PipelinePostfix property when generating code for such pipeline registers.

For example, suppose you specify a pipelined output implementation for a Product block in a model, as in the following code:

 hdlset_param('sfir_fixed/symmetric_fir/Product','OutputPipeline', 2)

The following makehdl command specifies that the coder appends'testpipe' to generated pipeline register names.

makehdl(gcs,'PipelinePostfix','testpipe');

The following excerpt from generated VHDL^® code shows process the PROCESS code, with postfixed identifiers, that implements two pipeline stages:

Product_outtestpipe_process : PROCESS (clk, reset)
  BEGIN
    IF reset = '1' THEN
      Product_outtestpipe_reg <= (OTHERS => to_signed(0, 33));
    ELSIF clk'EVENT AND clk = '1' THEN
      IF enb = '1' THEN
        Product_outtestpipe_reg(0) <= Product_out1;
        Product_outtestpipe_reg(1) <= Product_outtestpipe_reg(0);
      END IF;
    END IF;
  END PROCESS Product_outtestpipe_process;

Set or View This Property

To set this property, use hdlset_param or makehdl. To view the property value, use hdlget_param.

See Also

HDL Block Properties, InputPipeline, OutputPipeline