ClockRatePipelineOutputPorts

Enable clock-rate pipelining for DUT ports

Settings

'on'

Enable clock-rate pipelining for DUT ports.

'off' (default)

Disable clock-rate pipelining for DUT ports.

Set or View This Property

To set this property, use hdlset_param or makehdl. To view the property value, use hdlget_param.

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