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HDL Code Generation from Simulink
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Synthesis and timing analysis, Altera
®
, Xilinx
®
, Speedgoat, and custom FPGA boards, Xilinx Zynq
®
, Altera SoC
Synthesis and Timing Analysis
Place and route, back annotation, script generation
FPGA Floating-Point Libraries
Map to Altera and Xilinx FPGA floating-point libraries
Altera FPGA Boards
Deploy HDL code on Altera FPGA boards (requires HDL Verifier™)
Xilinx FPGA Boards
Deploy HDL code on Xilinx FPGA boards (requires HDL Verifier)
Xilinx Zynq-7000 Platform
Deploy HDL code on Xilinx Zynq-7000 platform
Altera SoC Platform
Deploy HDL code on Altera SoC platform
Simulink Real-Time FPGA I/O Boards
Deploy HDL code on
Simulink
®
Real-Time™
FPGA I/O boards (requires
Simulink Real-Time
)
Custom FPGA Boards
Create board definition files for FPGA Turnkey deployment
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