Documentation

When you select Generate optimization report, HDL Coder™ adds an Optimization Report section, with three subsections:

• Distributed Pipelining: If a subsystem has the DistributedPipelining option enabled, this subsection displays comparative listings of registers before and after you apply the distributed pipelining transform.

• Streaming and Sharing: Summary and detailed information about the subsystems for which you specify sharing or streaming optimizations, and the delay balancing summary.

• Target Code Generation: Summary, status, and path delay information about the subsystems after target code generation.

• Delay Balancing: Lists the number of pipeline delays and phase delays added at the output ports to match the delays.

Following are graphical representations of these report subsections.

Distributed Pipelining

A typical Distributed Pipelining report looks like this:

Hierarchical Distributed Pipelining in the Optimization Report

If HierarchicalDistPipelining is on, the Optimization Report uses colored sections to distinguish between different regions where HDL Coder applies hierarchical distributed pipelining.

Streaming and Sharing Report

Streaming Report

To see groups of blocks that belong to a streaming group in your Simulink^® model and in the generated model, click the Highlight streaming groups and diagnostics link in the report.

The streaming report shows a table that specifies:

• Group: A unique group ID for a group of Simulink blocks that belong to a streaming group.

• Inferred Streaming Factor: Streaming factor inferred by HDL Coder with the Streaming Factor that you specify in the HDL Block Properties.

See also Streaming.

Sharing Report

To see groups of blocks that share resources in your Simulink model and in the generated model, click the Highlight shared resources and diagnostics link in the Streaming and Sharing report.

Note:   If a MATLAB Function block in your Simulink model successfully shared resources, then the Highlight shared resources and diagnostics link cannot highlight the shared resources in the block.

The sharing report shows diagnostic messages and offending blocks that cause resource sharing to fail. The report also shows a table that specifies:

• Group Id: A unique ID for a group of similar Simulink blocks, such as add or product blocks, that share resources.

• Resource Type: The type of Simulink block in a sharing group.

• I/O Wordlengths: Word lengths of inputs to and output from the block in a sharing group.

• Group size: Number of blocks of the same type in a sharing group.

• Block name: Name of a block that belongs to a sharing group.

• Color Legend: Color that highlights all the blocks in a sharing group.

See also Resource Sharing.

Target Code Generation

When you map the design to a floating-point target library, the Target Code Generation report shows the status of mapping.

See also Generate HDL Code for FPGA Floating-Point Target Libraries.

Delay Balancing Report

The Delay Balancing Report shows the pipeline delay and phase delay at the output ports and the number of pipelines added at the output ports to match the delays.

If delay balancing fails, the report mentions the criterion that was violated and displays the link to any block or subsystem that caused delay balancing to fail.

See also Delay Balancing.

Adaptive Pipelining Report

The adaptive pipelining report displays the blocks for which HDL Coder inserted pipeline registers, the number of pipeline registers inserted, and any additional notes. Click the link to the block to see the pipeline registers inserted to the blocks in your design.

If adaptive pipelining fails, the report displays the criterion that caused adaptive pipelining to fail. For more information, see Adaptive Pipelining.