Define length of time (in clock cycles) during which reset is asserted
N
Default: 2.
N
must be an integer greater than
or equal to 0.
Resetlength
defines N
,
the number of clock cycles during which reset is asserted. The following
figure illustrates the default case, in which the reset signal (active-high)
is asserted for 2 clock cycles.
To set this property, use hdlset_param
or makehdl
. To view the property value, use hdlget_param
.