Modulate using rectangular quadrature amplitude modulation (HDL Coder)
The Rectangular QAM Modulator Baseband block is available with Communications System Toolbox™.
For information about the simulation behavior and block parameters, see Rectangular QAM Modulator Baseband.
This block has a single, default HDL architecture.
Number of registers to place at the outputs by moving existing delays within your design. Distributed pipelining does not redistribute these registers. The default is 0. See also ConstrainedOutputPipeline.
Number of input pipeline stages to insert in the generated code. Distributed pipelining and constrained output pipelining can move these registers. The default is 0. See also InputPipeline.
Number of output pipeline stages to insert in the generated code. Distributed pipelining and constrained output pipelining can move these registers. The default is 0. See also OutputPipeline.
The block does not support single or double data types for HDL code generation.
When Input Type is set to Bit,
the block does not support HDL code generation for input types other
than boolean or ufix1.
When the input type is set to Bit,
but the block input is actually multibit (uint16,
for example), the Rectangular QAM Modulator Baseband block does not
support HDL code generation.