Permute input symbols using set of shift registers with specified delays (HDL Coder)
The General Multiplexed Interleaver block is available with Communications System Toolbox™.
For information about the simulation behavior and block parameters, see General Multiplexed Interleaver.
The implementation for the General Multiplexed Interleaver block
is shift register based. If you want to suppress generation of reset
logic, set the implementation parameter ResetType to'none'.
When you set ResetType to'none',
reset is not applied to the shift registers. Mismatches between Simulink® and
the generated code occur for some number of samples during the initial
phase, when registers are not fully loaded. To avoid spurious test
bench errors, determine the number of samples required to fill the
shift registers. Then, set the Ignore output data checking
(number of samples) option accordingly. (You can use the IgnoreDataChecking property
for this purpose, if you are using the command-line interface.)
Number of registers to place at the outputs by moving existing delays within your design. Distributed pipelining does not redistribute these registers. The default is 0. See also ConstrainedOutputPipeline.
Number of input pipeline stages to insert in the generated code. Distributed pipelining and constrained output pipelining can move these registers. The default is 0. See also InputPipeline.
Number of output pipeline stages to insert in the generated code. Distributed pipelining and constrained output pipelining can move these registers. The default is 0. See also OutputPipeline.
Suppress reset logic generation. The default is default,
which generates reset logic. See also ResetType.