HDL Coder™ supports the following subset of MATLAB® data types.
Types | Supported Data Types | Restrictions |
---|---|---|
Integer |
| In Simulink®, MATLAB Function block ports
must use numeric types sfix64 or ufix64 for
64-bit data. |
Real |
| HDL code generated with double or single data
types can be used for simulation, but is not synthesizable. |
Character | char | |
Logical |
| |
Fixed point |
| Fixed-point numbers with slope (not equal to 1.0) and bias (not equal to 0.0) are not supported. Maximum word size for fixed-point numbers is 128 bits. |
Vectors |
| The maximum number of vector elements allowed is 2^32. Before a variable is subscripted, it must be fully defined. |
Matrices |
| Matrices are supported in the body of the design algorithm, but are not supported as inputs to the top-level design function. Do not use matrices in the testbench. |
Structures | struct | Arrays of structures are not supported. For the FPGA Turnkey and IP Core Generation workflows, structures are supported in the body of the design algorithm, but are not supported as inputs to the top-level design function. |
Enumerations | enumeration | Enumeration values must be monotonically increasing. If your target language is Verilog®, all enumeration member names must be unique within the design. Enumerations at the top-level DUT ports are not supported with the following workflows or verification methods:
|
In the current release, the following data types are not supported:
Cell array
Inf
Global variables are not supported for HDL code generation.